1. Field of the Invention
The present invention relates to a fabrication method for fabricating a semiconductor device such as a thin film transistor and a fabrication apparatus therefor. Particularly, the present invention relates to a fabrication method for fabricating a thin film transistor for use in an active matrix type liquid crystal display and an apparatus for realizing the same method.
2. Description of the Related Art
Recently, the research and development of the thin film transistor used as a driving device for each of pixels of a liquid crystal flat panel display has been promoted remarkably. With the popularization of the note type personal computer, the demand of liquid crystal display is increased rapidly and, further, with the increased demand of the same for a large size monitor display, the improvement of productivity thereof and the improvement of performance thereof have been required.
The productivity of liquid crystal display depends upon the fabrication step of a thin film transistor substrate and one of important factors which determine the performance of high precision liquid crystal display is the performance of thin film transistor element. Therefore, it will become very important to fabricate a high performance thin film transistor with high productivity.
In the reverse-staggered type thin film transistor, a non-doped amorphous silicon is used as an active layer. An n-type amorphous silicon film is formed on the amorphous silicon film as an ohmic contact layer, and source and drain electrodes are provided thereon. In the conventional fabrication method of reverse-staggered type thin film transistor, the n-type amorphous silicon film is formed by using plasma CVD, mainly. For example, Japanese Patent Application Laid-open Nos. Hei 5-304171, Hei 9-223800 and Hei 10-12882 disclose method for fabricating the n-type amorphous silicon film by using plasma CVD.
The method disclosed in Japanese Patent Application Laid-open No. Hei 5-304171 will be described briefly as a general method of reverse-staggered type thin film transistor.
First, a metal film is formed on a transparent insulating substrate 1 and a gate electrode is formed by patterning the metal film to a desired shape. Thereafter, a silicon nitride film as a gate insulating film, an amorphous silicon film and an n-type amorphous silicon film are formed on the gate electrode in the order by plasma CVD, etc.
Then, the n-type amorphous silicon film and the amorphous silicon film are patterned to an island configuration. Further, after a metal film is formed on a whole surface of the wafer, the source and drain electrodes are formed by patterning the metal film.
Finally, unnecessary portion of the n-type amorphous silicon film on a channel is removed by etching, resulting in a reverse-staggered type thin film transistor.
In order to fabricate the thin film transistor with high yield, it is preferable to make the number of film forming steps as small as possible. If it is possible to fabricate a thin film transistor without separately forming the n-type amorphous silicon film, it becomes possible to improve the yield and reduce the fabrication cost.
A method for fabricating a reverse-staggered thin film transistor without separately forming an n-type amorphous silicon film is disclosed in Japanese Patent Application Laid-open No. Hei 2-163971. According to the disclosed method, the formation of the n-type amorphous silicon film becomes unnecessary by using a metal containing nickel phosphide for source and drain electrodes. Furthermore, the metal for the source and drain electrodes are formed by sputtering with using nickel phosphide and another metal or a mixture of them as a target material. It is described in the specification of Japanese Patent Application Laid-open No. Hei 2-163971 that measurements of characteristics of a thin film transistor fabricated according to the disclosed method is substantially the same as those of a thin film transistor having an n-type amorphous silicon film formed separately.
A method for continuously forming an amorphous silicon film, a gate insulating film and an aluminum film for forming a gate wiring on a substrate in vacuum is disclosed in Japanese Patent Application Laid-open No. Hei 9-331067.
However, according to the method disclosed in Japanese Patent Application Laid-open No. Hei 2-163971, a new problem that a resistance value of the source and drain electrodes is increased since phosphor is contained in the source and drain electrodes as an impurity.
Particularly, this problem becomes a source of signal delay in realizing a large size liquid crystal display and influences a displayed image adversely.
Further, according to the method disclosed in Japanese Patent Application Laid-open No. Hei 9-331067, in which the amorphous silicon film is formed as the lowest layer, it is necessary, in order to make the amorphous silicon film n type, to inject phosphor ions into the amorphous silicon film first. Therefore, it is very difficult to avoid the necessity of separately forming the n-type amorphous silicon film.
An object of the present invention is to provide a method for fabricating a thin film transistor having the source and drain electrodes free from phosphor impurity, without necessity of separately forming an n-type amorphous silicon film, and an apparatus for performing the same method.
According to the first aspect of the present invention, the object can be achieved by a method for fabricating a semiconductor device such as a thin film transistor, which comprises the first step of forming an amorphous silicon film on a substrate, the second step of performing a plasma processing with respect to a substrate having the amorphous silicon film formed thereon and the third step of forming a metal film on the amorphous silicon film while keeping the reduced pressure condition. The plasma processing contains an n-type impurity element selected from a group V of a periodic table to provide an n-type region in the top surface of the amorphous silicon film. For example, a phosphine plasma processing is performed under a reduced pressure condition.
According to this method, an impurity element of the group V such as a phosphor is either deposited on a surface of the amorphous silicon film or diffused into the surface thereof in the second step. Thereafter, when the metal film is formed in the third step, the phosphor further diffuses into a surface portion of the amorphous silicon film, so that an n-type amorphous silicon film is automatically formed between the metal film and the amorphous silicon film. That is, according to the present method, the metal film for forming the source and drain electrodes is free from the above mentioned impurity such as the phosphor impurity and it is unnecessary to form an n-type amorphous silicon film separately.
According to the second aspect of the present invention, the object can be achieved by a method for fabricating a semiconductor device, which comprises the first step of forming an amorphous silicon film on a substrate under a reduced pressure condition, the second step of performing a phosphine plasma processing with respect to the substrate without exposing the substrate to an oxidizing atmosphere and the third step of forming a metal film on the amorphous silicon film. Preferably, at least two adjacent steps are successively performed without exposing the substrate to the oxidizing atmosphere.
According to this semiconductor fabricating method, it is possible to obtain a similar effect to that obtained by the thin film transistor fabrication method mentioned previously. Especially, a cleaner interface can be achieved by performing each process without exposing the substrate to the oxidizing atmosphere.
According to the third aspect of the present invention, the object can be achieved by a method for fabricating a semiconductor device, which comprises the first step of forming an insulating film and an amorphous silicon film covering a gate electrode formed on a substrate, sequentially, the second step of patterning the amorphous silicon film, the third step of depositing phosphor on a surface of the amorphous silicon film by exposing the substrate to phosphine plasma under a reduced pressure condition and the fourth step of forming a metal film covering the amorphous silicon film while keeping the reduced pressure condition.
A similar effect to that obtained by the previously mentioned method according to the first or second aspect of the present invention can be obtained by this method.
According to the fourth aspect of the present invention, the object can be achieved by a method for fabricating a semiconductor device, which comprises the first step of forming an insulating film and an amorphous silicon film covering a gate electrode formed on a substrate, sequentially, the second step of depositing phosphor on a surface of the amorphous silicon film by exposing the substrate to phosphine plasma under a reduced pressure condition, the third step of forming a metal film on the amorphous silicon film while keeping the reduced pressure condition and the fourth step of patterning the metal film.
A similar effect to that obtained by the method according to the second aspect of the present invention can be obtained by this method.
In the former method according to the third aspect of the present invention, the phosphine plasma processing and the metal film formation are executed after the amorphous silicon film is patterned to a desired island configuration, for example. However, according to the latter method according to the fourth aspect of the present invention, it is possible to pattern the metal film and the amorphous silicon film to a desired island configuration after the formation of the amorphous silicon film, the phosphine plasma processing and the formation of the metal film are performed continuously.
These methods may further comprise the fifth step of removing unnecessary portion of the amorphous silicon film between the source and drain electrodes.
The fifth step may be performed simultaneously with the fourth step when the metal film is patterned by either one of dry etching or wet etching.
That is, by dry or wet etching the metal film from which the source and drain electrodes are formed, it is possible to remove unnecessary portion of a very thin n-type amorphous silicon film, that is, an ohmic contact layer. Thus, the step for removing or reforming the unnecessary portion of the n-type amorphous silicon film, such as an etching step or a plasma processing step, can be removed.
Alternatively, it is possible to convert the unnecessary portion of the amorphous silicon film between the source and drain electrodes into an insulating film by performing a plasma processing for the unnecessary portion.
According to the sixth aspect of the present invention, the object can be achieved by a semiconductor fabrication apparatus capable of successively performing an exposition of an amorphous silicon film formed on a substrate to phosphine plasma and a formation of a metal film on the amorphous silicon film while keeping a reduced pressure condition.
According to the seventh aspect of the present invention, the object can be achieved by a semiconductor fabrication apparatus capable of continuously performing a formation of an amorphous silicon film on a substrate, an exposition of the amorphous silicon film to phosphine plasma and a formation of a metal film on the amorphous silicon film while keeping a reduced pressure condition.
According to the eighth aspect of the present invention, the object can be achieved by a semiconductor fabrication apparatus comprising the first chamber for exposing a substrate to phosphine plasma, the second chamber for forming a metal film on the substrate and a gate valve for connecting the first chamber to the second chamber while keeping a reduced pressure condition.
According to the ninth aspect of the present invention, the object can be achieved by a semiconductor fabrication apparatus comprising the first chamber for heating a substrate, the second chamber for exposing the substrate to phosphine plasma, the third chamber for forming a metal film on the substrate, the first gate valve for connecting the first chamber to the second chamber while keeping a reduced pressure condition and the second gate valve for connecting the second chamber to the third chamber while keeping the reduced pressure condition.
According to the tenth aspect of the present invention, the object can be achieved by a semiconductor fabrication apparatus comprising the first chamber for heating a substrate, the second chamber for exposing the substrate to phosphine plasma, the third chamber for forming a metal film on the substrate, the fourth chamber functioning as a space for transporting the substrate, the first gate valve for connecting the first chamber to the fourth chamber while keeping a reduced pressure condition, the second gate valve for connecting the second chamber to the fourth chamber while keeping the reduced pressure condition and the third gate valve for connecting the third chamber to the fourth chamber while keeping the reduced pressure condition.
According to the eleventh aspect of the present invention, the object can be achieved by a semiconductor fabrication apparatus comprising the first chamber for heating a substrate, the second chamber for forming a gate insulating film on the substrate, the third chamber for forming an amorphous silicon film on the substrate, the fourth chamber for exposing the substrate to phosphine plasma, the fifth chamber for forming a metal film on the substrate, the first gate valve for connecting the first chamber to the second chamber while keeping a reduced pressure condition, the second gate valve for connecting the second chamber to the third chamber while keeping the reduced pressure condition, the third gate valve for connecting the third chamber to the fourth chamber while keeping the reduced pressure condition and the fourth gate valve for connecting the fourth chamber to the fifth chamber while keeping the reduced pressure condition.
According to the twelfth aspect of the present invention, the object can be achieved by a semiconductor fabrication apparatus comprising the first chamber for heating a substrate, the second chamber for forming a gate insulating film on the substrate, the third chamber for forming an amorphous silicon film on the substrate, the fourth chamber for exposing the substrate to phosphine plasma, the fifth chamber for forming a metal film on the substrate, the sixth chamber functioning as a space for transporting the substrate, the first gate valve for connecting the first chamber to the sixth chamber while keeping a reduced pressure condition, the second gate valve for connecting the second chamber to the sixth chamber while keeping the reduced pressure condition, the third gate valve for connecting the third chamber to the sixth chamber while keeping the reduced pressure condition, the fourth gate valve for connecting the fourth chamber to the sixth chamber while keeping the reduced pressure condition and the fifth gate valve for connecting the fifth chamber to the sixth chamber while keeping the reduced pressure condition.
The previously mentioned methods for fabricating semiconductor devices can be performed by the above mentioned semiconductor device fabrication apparatuses.